As a solid-state imaging device, those using the CMOS technique are known, and among these, a passive pixel sensor (PPS) type solid-state imaging device is known (see Patent Document 1). The PPS type solid-state imaging device has a structure in which PPS type pixel portions, each including a photodiode for generating charges of an amount corresponding to an incident light intensity, are arranged two-dimensionally in M rows and N columns. In each pixel portion, charges generated in the photodiode in response to light incidence are accumulated in a capacitive element of an integrating circuit, and a voltage value corresponding to the accumulated charge amount is outputted.
In general, output terminals of M pixel portions belonging to each column are connected to an input terminal of an integrating circuit provided corresponding to the column via a reading-out wiring provided corresponding to the column. In order from the first row to the M-th row, charges generated in the photodiodes of the pixel portions are inputted into the corresponding integrating circuit via the corresponding reading-out wiring, and a voltage value corresponding to the amount of charges is outputted from the integrating circuit.
The N pixel portions belonging to each row are respectively connected to a controlling section via a row selecting wiring provided corresponding to the row. According to a row selecting controlling signal transmitted from the controlling section via the row selecting wiring, the pixel portions output charges generated in the photodiodes to the reading-out wirings.
The PPS type solid-state imaging device is used for various purposes. For example, a PPS type solid-state imaging device is combined with a scintillator panel and used as an X-ray flat panel for a medical purpose or an industrial purpose. Further, a PPS type solid-state imaging device is used in an X-ray CT apparatus and a micro-focus X-ray inspection apparatus, etc. The solid-state imaging device to be used for these purposes comprises a large-area photodetecting section including M×N pixel portions two-dimensionally arrayed, and the photodetecting section may be integrated on a semiconductor substrate each side of which has a length over 10 cm. Therefore, in some cases, only one solid-state imaging device is produced from one semiconductor wafer.    Patent Document 1: Japanese Laid-Open Patent Application No. 2006-234557